Ericsson's cloud RAN affair with Intel is a puzzle

You don't have to be a Sherlock Holmes with the most forensic eye to spot what looks like a contradiction within Ericsson's chips strategy. Visit the website page all about Ericsson Silicon, the Swedish vendor's in-house chips unit, and you are quickly drawn to a chart that is dismissive of general-purpose processors. Even with the added oomph of hardware (HW) accelerators, such commercial, off-the-shelf (COTS) equipment is a power hog next to Ericsson's custom-made kit. Yet a white paper co-authored with Verizon last year seems to reach the opposite conclusion.

It compares two different architectures for a cloud radio access network (RAN). In one, sometimes referred to as "lookaside," most of the baseband (Layer 1) software lives on a general-purpose central processing unit (CPU), probably made by Intel, the dominant force in that market. The alternative, usually dubbed "inline," shifts these Layer 1 functions onto a separate, customized chip. Despite Ericsson's assertion about the superiority of its own silicon, it is the Intel-backed lookaside architecture that scores better.

These charts, which are reproduced below, aren't showing precisely the same thing, but they are similarly trying to reach conclusions about energy efficiency. In the Ericsson Silicon chart, a higher placement on the y-axis means the chip consumes more power. In the Verizon white paper, the y-axis specifically measures processing bandwidth per watt, and so the inverse is true. If lookaside (or what Ericsson calls "selected function HW accelerator") sits high in this chart, then COTS with HW accelerators should be at the bottom of the Ericsson Silicon graph, you might logically surmise. But it's not.

(Source: Ericsson, Verizon)

(Source: Ericsson)

This is not a trivial, technical point. Energy efficiency and performance are paramount considerations for telcos choosing a technology. A yawning gap between two options could be disastrous for the laggard. What's more, rather than hedging their bets, Ericsson and Nokia have picked opposing teams. Through a partnership with Marvell Technology, Nokia backs the use of custom silicon for Layer 1 in both purpose-built and cloud RAN. Ericsson naturally relies on custom-made chips in its traditional gear. But for cloud RAN, it prefers Intel's CPUs.

Hitting the accelerator

At least, that is what it claims. The rationale makes a lot of sense, too. Purpose-built networks, everyone accepts, are all about proprietorial melding of hardware and software. The cloud RAN is supposed to mark a big step toward disaggregation and openness. A company should, ideally, be able to adapt software on the fly, move it from one hardware platform to another, plonk it in any cloud and share computing resources. You can't do that with customized and proprietary tools, the argument goes. You can with Intel's x86 architecture and general-purpose chips.

While these are not an official standard, they have become a de facto one, much as Google is for Internet search. For years, the Santa Clara-based chipmaker has forged and strengthened ties with all parts of the computer industry. Coding on Intel's Xeon family of CPUs can be done with standard languages like C/C++. Those CPUs can be supported on widely used platforms such as Linux and Kubernetes. All this makes them open and programmable in a way that Marvell's chips are not, say advocates.

Yet even Intel has recognized that unaided CPUs are not up to the Layer 1 job. This recognition is implicit in Intel's development of hardware accelerators as a crutch for the most demanding software. Intel's Layer 1 accelerators have previously taken the form of eASICs, which it describes as a technological midpoint between FPGAs (field programmable gate arrays) and standard ASICs (application-specific integrated circuits). FPGAs can be modified throughout their lifetime. ASICs, which can't, include the customized silicon that Ericsson makes for its purpose-built kit and that Marvell produces for Nokia.

Any use of this puts Intel in a tricky position, just as general-purpose processors raise awkward questions for Ericsson. Today, Intel generates most of its revenues from sales of general-purpose hardware intended for computers and servers. A shift to the use of what Nvidia CEO Jensen Huang calls "accelerated computing" is a massive threat to this business and may have borne a little responsibility for the 21% drop in Intel's sales for the first nine months of this year, to about $39 billion. What's more, Intel is now spinning off its programmable solutions group, the unit it developed after buying Altera, a maker of FPGAs and ASICs, for nearly $17 billion in 2015.

Unsurprisingly, then, Intel is keen to play down any talk of its cloud RAN accelerators as a big departure from its general-purpose principles. Currently, they handle only a single Layer 1 function known as forward error correction (FEC). While hungry for resources, FEC is not where the innovation lies, according to Ericsson. Even so, this important, Intel-supplied function is "fixed" and therefore not programmable, both Ericsson and Intel acknowledge.

By using a standardized interface between this accelerator and the CPU, RAN software developers should be able to maintain programmability for most functions. They should also be able to use all that software with another CPU. Ericsson claims to have already demonstrated this with AMD. Nokia, meanwhile, has conceded that a move from Marvell's customized silicon to another Layer 1 supplier would necessitate some heavy lifting. Much of the software powering critical functions comes directly from Marvell.

Nevertheless, Ericsson has not yet demonstrated this software "portability" with any chipmakers bar Intel and AMD, both of which use x86 as the architecture. Running the same software on a CPU based on the rival Arm instruction set would be harder. It is also unclear if Ericsson would be able to combine Intel's accelerator with an AMD processor when these components remain separate.

Customization may be key

In the future, though, it probably wouldn't. Previously, Intel supplied its accelerator on a PCIe card, separate from the CPU-equipped server. With a product set called Sapphire Rapids EE (SPR-EE), it is hosting that accelerator on the same die as the CPU. To critics, the result looks more customized than Intel makes out. Nokia is in the vanguard of the opposition, deriding SPR-EE as "not a general CPU but a purpose-built one" in slides recently shown to reporters.

Worse is to come, they say. A forthcoming product under the Granite Rapids brand will unite the CPU, accelerator and fronthaul connectivity all on the same die. Granite Rapids, Light Reading has learned, may also push more RAN software off the CPU and onto the accelerator, including some of the channel estimation processing in massive MIMO, an advanced 5G technology due for widespread deployment. These "fixed" functions, of course, will not be programmable.

Customization would arguably suit Ericsson from a performance angle and even allow it in the future to converge on a single Layer 1 track for both purpose-built and cloud RAN technology. It could also make its arguments about energy efficiency easier to justify. In the white paper it wrote with Verizon, it blames the shortcomings of "inline" accelerators largely on their use of PCIe cards. If Intel's technology becomes just as "purpose-built" as Marvell's, those cards might be the most notable difference.

But customization would be an obvious challenge to many of the arguments both Ericsson and Intel have served up about cloud RAN. With more functionality fixed and coded for a specific accelerator, less software remains programmable and deployable on other chips. Joel Brand, Marvell's senior director of product marketing, thinks Nokia is no tighter with his employer than Ericsson is with Intel.

For signs of that, look to Ericsson's recent statements about Intel's involvement in its work on both cloud RAN and purpose-built chips. Besides flagging its collaboration with Intel on Xeon processors and accelerators, the Swedish vendor identifies Intel as the manufacturer of its system-on-a-chip (SoC) hardware for traditional RAN, including Layer 1 processing.

Ericsson does not, however, name Intel as a co-designer of those SoCs, and there is still a hunch outside the company that it plays a bigger role than Nokia does in silicon. But if Ericsson rates the performance of Intel's accelerated Xeon processors so highly, why bother? "Does it make sense to build custom or focus resources on the software that is on top of it, where they deliver the most differentiation?" said Sachin Katti, the general manager of Intel's network and edge group, during an interview with Light Reading in late 2022. It's a good question.